Superior Quality Assurance Solutions for Advanced Packaging & Mini/Micro-LED Applications
Semiconductor packaging has become one of the most dynamic areas of electronics innovation. From system in package (SiP) and chiplet integration to fan out wafer level packaging (FOWLP) and 3D stacked architectures, new designs are demanding extreme precision in assembly and inspection. Deviations in coplanarity, surface contamination, voids in underfill, or tilted dies can jeopardize signal integrity and mechanical reliability.
To succeed in this environment, manufacturers need semiconductor metrology and inspection systems that deliver high resolution, high speed, and comprehensive 3D measurement capabilities, capable of analyzing everything from solder bumps to reflective silicon dies. Learn more about Semiconductor Metrology.
Koh Young’s Semiconductor Metrology is tailored for wafer and die inspection, detecting even the smallest irregularities to maintain the integrity of semiconductors at the foundational level. Complementing these inspection solutions, Koh Young’s Smart Factory Solutions embrace Industry 4.0 advancements, optimizing semiconductor manufacturing through data analytics, AI, and automation.
Metrology vs. Inspection: Why the Distinction Matters
In semiconductor manufacturing, metrology is distinct from inspection. Inspection answers a binary question: pass or fail. Metrology answers a quantitative one — how tall, how flat, how much volume, by how many microns. In advanced packaging, where the margin between a good joint and a reliability risk is measured in single-digit microns, that difference decides whether you can control a process or only sort its output.
An inspection system tells you a micro-bump is too short. A metrology system tells you it measured 62.3 μm against a 65 μm target, and that the standard deviation across the wafer is 0.8 μm. That second answer changes the engineering response: the trend is drifting, the drift is directional, and there is enough margin to correct the plating step before anything falls out of tolerance.
This is why measurement data, not defect counts, is what feeds statistical process control. A defect count tells you how often you failed. A measurement distribution tells you how close you are to failing next.
What Gets Measured in Advanced Packaging
Advanced packaging compresses more function into less space, which leaves less room for process drift. The dimensions that matter most are the ones 2D imaging cannot resolve:
- Bump and ball height — insufficient height risks an open after reflow; excess risks a bridge
- Coplanarity — the height distribution across a die or package, which determines whether every joint contacts
- Volume — the measurement that actually predicts joint strength, and one that area alone cannot infer
- Warpage — substrate and wafer distortion that shifts every feature on the part
- Die tilt — the angle of a placed die, which governs bond quality in stacked and hybrid-bonded assemblies
Each of these is a height measurement. None can be derived reliably from a top-down greyscale image, which is why metrology-grade 3D measurement is the baseline requirement rather than an upgrade. The systems below each cover a different stage of that flow.
Metrology Across the Packaging Workflow
No single measurement stage tells you where a problem started. Advanced packaging builds value across several steps, and a defect found at the end is usually the visible end of variation introduced earlier.
At wafer level, ZenStar establishes bump and pillar geometry before singulation — the reference every later stage is judged against, at 300 mm and 14 wafers per hour, with Z resolution to 0.1 μm and height accuracy under 1 μm. At die level, Meister D and D+ measure the singulated die: dimensional integrity, cracks and chipping from dicing, and the tilt that determines bond quality. At solder and bump level, Meister S and S+ measure the deposits that form the interconnect, the S+ resolving bumps to 50 μm diameter at 650 mm²/sec.
The value is in the sequence, not in any one station. When a bond fails final test, measurement data from each prior stage lets an engineer trace backward — was the bump already short at wafer level, did the die arrive tilted, or did the substrate paste volume run low? Without dimensional data at each step, that investigation is guesswork. With it, the answer is a query. Automotive, medical, and aerospace programmes increasingly expect exactly that: lot genealogy and retained measurement histories, not just a pass record.
Metrology-Grade Measurement for Substrate Assembly
Not all semiconductor metrology happens at wafer level. Advanced substrate assembly — placing passives, connectors, and interposers on organic or ceramic substrates — needs paste and component measurement held to the same standard. The aSPIre 3 measures deposits at 0.37 μm Z resolution with 1 μm height accuracy and a Gage R&R under 10% at 6 sigma, supporting components down to 03015 metric. That gauge capability is what makes the output usable as process data rather than just a screening result.
Making Metrology Data Actionable
Measurement is only worth its cost if something acts on it. Data from ZenStar, Meister, and aSPIre 3 systems flows into KSMART, where it drives process control rather than just reporting. Real-time SPC tracks stability across wafers and lots. KAP reduces programming time by up to 70%. Smart Review consolidates verification at twice the productivity of separate review stations. KPO closes the loop upstream — the printer module optimises parameters up to 12 times faster than manual tuning, with up to 47% higher productivity, and the mounter module corrects up to 90% of placement offsets automatically.
The result is a line where a drift detected at measurement becomes a correction at the process step that caused it.
Semiconductor Metrology Solutions for Advanced Packaging
Dimensional accuracy, process control, and intelligent feedback are essential pillars of modern semiconductor metrology and inspection.